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UIT2201: Tutorial Set 9 (Spring 2013)
(Solution Sketch to Selected Problems)
** NOT TO BE GIVEN TO FUTURE UIT2201 STUDENTS **

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T9-D1: (Multiplexor Circuits) [2- and 4-input MUXes] -- SOLUTION SKETCH
(a) [2-input MUX] Can use this MUX as "basic" circuit. It uses 2 AND gates and one OR gate.

(b) [4-input MUX]
(i) The first design uses the idea of divide-and-conquer and "reuses the result". Its total size is 3 x (size of basic MUX) = 6 AND gates and 3 OR gates.
(ii) This second design uses the idea of "reuse the method" and uses 3-input AND gates, each is equivalent to two 2-input AND gates. Thus, total size of this design is 8 AND gates and 3 OR gates.

T9-D3: (MAR) -- SOLUTION SKETCH
Row decoder = 10 bits, Column decoder = 12 bits;
MAR = 10+12 = 22 bits long.

T10-D4: (ALU and MUX) -- SOLUTION SKETCH
Need a 32-to-1 MUX (with 5-bit address selector).

(Optional-Fun-Note: 24 of the MUX inputs are used; 8 are unused. The 8 unused MUX inputs can be used to optimize the design of the MUX in order to reduce area or to save power consumption or both. This is the subject of very interesting research work. If you are interested in knowing more, see Prof Leong's research papers on "Low Power MUX Decomposition" [here (pdf)].)

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 S[2] S[1] S[0]  | Output
 -------------------------
   0    0    0   |  D0
   0    0    1   |  D1
   0    1    0   |  D2 
   0    1    1   |  D3 
   1    0    0   |  D4
   1    0    1   |  D5
   1    1    0   |  D6 
   1    1    1   |  D7 
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T9-Q2: (10 points) [3-to-8 Decoder Circuit] --- DIY

T9-Q3: (5 points) (modified from 2008 Quiz 2) -- SOLUTION SKETCH
(a) MAR has 20 bits; Memory size = 2^20 locations. (1,048,576 locations).
(b) Dimensions: 1024 x 1024; 10 bits for row selector; 10 bits for column selector;

T9-Q4: (5 points) (FUN -- Annotating your Eliza "conversation") --- DIY.