Hi! I am a PhD student at KISP Lab, School of Computing, National University of Singapore. I am working with Prof Prateek Saxena on system security. I am interested in the design of secure computer architectures with features such as full memory safety and fine-grained isolation. The main projects I have been working on are: Capstone, a capability-based architecture providing a unified foundation for building secure systems, and AnvilHDL, a hardware description language which enforces timing safety with dynamic timing contracts.
Check out my CV for more details about me!