An embedded system runs one specific application throughout its lifetime. This gives designers the opportunity to develop customized architectures for an embedded application. The customization can take many forms: (1) extending the instruction-set architecture (ISA) of the processor with application-specific custom instructions, (2) adding a reconfigurable co-processor to the processor, and (3) configuring various parameters of the underlying micro-architecture such as cache size, register file size etc. However, given the short time-to-market constraint for embedded systems, this customization should be (semi)-automatic. The aim of this project is to develop a systematic methodology to choose and implement performance optimal customization within area and energy constraints. I